发明名称 Reconfigurable multiprocessor digital filter.
摘要 <p>Apparatus for an array of digital signal processors (P1,1-Pn,n) that can be reconfigured as a one-dimensional or as a two-dimensional array; and method and apparatus for compensating for inconsistent time delays in signals processed by n-dimensional arrays of signal processors.</p>
申请公布号 EP0352867(A2) 申请公布日期 1990.01.31
申请号 EP19890201971 申请日期 1989.07.27
申请人 LSI LOGIC CORPORATION 发明人 RUETZ, PETER A.
分类号 G06F15/16;G06F15/173;G06F15/80;H03H17/00;H03H17/02;H03H17/08 主分类号 G06F15/16
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