发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To decrease a current density of a primary word line of a DRAM of an Al short circuit system as retaining a driving power so as to protect the word line against disconnection by a method wherein the primary word line and a corresponding divided word line are connected each other through the intermediary of a corresponding logic gate. CONSTITUTION:In a DRAM, memory cells are arranged at cross points of word lines and data lines. A word line is divided into p+1 divided word lines SW0-SWP in a direction in which the word line extends at a Si layer. The divided word lines are commonly connected with corresponding primary word lines MWn respectively through the intermediary of two inverters in a series state. Therefore, a load connected to each primary word line is only an input capacitance of pre-stage inverters N1-N5. The driving capability of each word line MWn is gradually expanded through CMOS inverters in a series state, so that FETs of the pre-stage invertors N1-N3 are made miniaturized. so that the current density of each primary word line MWn can be decreased and consequently the connection failure of the word line due to migration can be prevented.
申请公布号 JPH0225068(A) 申请公布日期 1990.01.26
申请号 JP19880172720 申请日期 1988.07.13
申请人 HITACHI LTD 发明人 KAJITANI KAZUHIKO
分类号 G11C11/407;G11C11/401;H01L21/3205;H01L21/8242;H01L23/52;H01L27/10;H01L27/108 主分类号 G11C11/407
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