发明名称 |
Dynamic random access memory having a trench capacitor |
摘要 |
A very highly integrated semiconductor memory which enables the dynamic random access memory to develop less soft error and to eliminate margin for aligning the masks, that hinders the device from being highly integrated. The memory cell capacitor is constituted by a trench which is provided at a position defined by an insulator formed on the side of gate electrode of a MOS transistor that constitutes the memory cell. Therefore, the MOS transistor and the trench capacitor are self-aligned, and no margin is required for alignment.
|
申请公布号 |
US4894696(A) |
申请公布日期 |
1990.01.16 |
申请号 |
US19860938967 |
申请日期 |
1986.12.08 |
申请人 |
HITACHI, LTD. |
发明人 |
TAKEDA, EIJI;ITOH, KIYOO;HORI, RYOICHI;SHIMOHIGASHI, KATSUHIRO;KIMURA, KATSUTAKA |
分类号 |
H01L27/10;G11C11/34;H01L21/8242;H01L27/108 |
主分类号 |
H01L27/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|