发明名称 CLOCK EXTRACTION CIRCUIT
摘要 PURPOSE:To easily extract a stable clock without any fault in the phase from plural burst signals sent from a different transmitter in a receiver of the TDMA system by using other tank circuit for each time slot so as to extract a clock. CONSTITUTION:In the case of extracting a clock from a burst signal sent from different transmitters in a demodulation circuit used for a receiver of the time division multiple address(TDMA) system, the 1st switching circuit 2 and the 2nd switching circuit 5 are controlled by using a control signal to select either the 1st tank circuit 3 or the 2nd tank circuit 4 in the quiescent time of the burst signal. Then the tank circuit applying clock extraction of a preceding burst signal and the tank circuit extracting the clock of the succeeding burst signal are switched alternately. Thus, the effect of the preceding burst signal onto the clock recovery of the burst signal in succession to the preceding burst signal is prevented and the clock is stably extracted.
申请公布号 JPH027637(A) 申请公布日期 1990.01.11
申请号 JP19880157357 申请日期 1988.06.24
申请人 NEC CORP 发明人 TOGASHI KAZUYUKI
分类号 H04J3/06;H04L7/02;H04L7/027;H04L7/10 主分类号 H04J3/06
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