| 摘要 |
PURPOSE: To synchronize the rise of an input signal with the transition of a clock signal within one period of a clock signal at maximum by providing the two-step type synchronizing device with a pair of flip flops(FFs) constituted to write an input signal at the time of transition of a periodical pulse string to a positive pole or a negative pole. CONSTITUTION: At the time of transition of a CLK signal to the positive pole, an FF 12 writes an IN signal, and at the time of transition of the CLK signal to the negative pole, an FF 14 writes an IN signal. Output signals from the FFs 12, 14 are inputted to an OR gate 20 and respectively transmitted to the data(D) input terminals of FFs 16, 18. All of three output signals O1 to O3 form the display format of the IN signal synchronized with the transition of the CLK signal. Similar analysis can be applied also to the transition of the IN signal to the negative pole. |
