发明名称 DECIMAL/BINARY CONVERSION SYSTEM
摘要 PURPOSE:To reduce the processing time and to suppress the increase in the quantity of hardware by applying the decimal to binary conversion in the unit of two digits in a decimal number (in the unit of byte). CONSTITUTION:A value being a multiplication of a high-order 1 digit by 10 in a decimal 2-digit (1 byte) segmented sequentially from the high order of a decimal numeral string 2 by a selector 1 is given to an adder 5, the low-order 1 digit is given directly to the adder 5 and values being the result of multiplication of a carry and a sum by a factor of 100 respectively by shifters 4-1, 4-2 are supplied to the adder 5. Then the addition of (100 times the result of preceding cycle)+(10 times the high-order decimal 1 digit)+(low-order decimal 1 digit) is applied and the sum of carriers and check-sum being the result of addition is outputted as the result of decimal-binary conversion. Since the signal is converted into a binary signal by decimal 2-digit (1 byte) each in such a way, the processing time is reduced and the quantity of hardware is decreased.
申请公布号 JPH01314020(A) 申请公布日期 1989.12.19
申请号 JP19880146669 申请日期 1988.06.13
申请人 FUJITSU LTD 发明人 KOISHIKAWA TAKESHI
分类号 G06F5/00;H03M7/12 主分类号 G06F5/00
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