| 摘要 |
PURPOSE:To attain the recovery processing for the error at a high speed without stopping the action of hardware by providing an error bit at a tag array corresponding to the data buffer of a central processing unit and a shadow tag array corresponding to a main memory. CONSTITUTION:Error bits 13, 17 and 21, 25 are provided at tag arrays 6 and 7 corresponding to data buffers 4 and 5 and shadow tag arrays 8 and 9 corresponding to a main memory 3, an unfair memory address cannot be reported once to the software of a CPU, and even then, the unfair memory address can be reported to the software each time the access is executed for the same error block. The error block can be used again by the rewriting processing of the data for the whole of the block and the error decision can be executed at a high speed even concerning the access from other CPU. Thus, the recovery processing for the error can be executed at a high speed without stopping the action of the hardware. |
