发明名称 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
摘要 A method is disclosed for the manufacture of a multilayered interconnect structure on an insulating substrate (l). First and second conductive layers (2, 3) are formed on one and on the other (rear) surfaces, respectively, of the insulating substrate (l). An insulating layer (7) is formed, by means of a plasma CVD method, on the surface of the insulating substrate (l), to electrical insulation between interconnect layers (8, l3). This is followed by a reactive ion etching step. This results in the formation of the aforementioned layer of a uniform thickness and having a uniform etching rate. That is, with the conductive layer (3) formed on the rear surface of the insulating substrate (l), the complete insulating substrate (l) is placed at the same potential level, whereby a uniform electrochemical reaction occurs on the surface thereof (l), resulting in the formation of the layers (7, 8, ll, l3) having a uniform etching rate, and in the formation of these layers each having the same thickness.
申请公布号 EP0239746(A3) 申请公布日期 1989.11.23
申请号 EP19870101503 申请日期 1987.02.04
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAGAKUBO, YOSHIHIDE PATENT DIV.
分类号 H01L21/3213;H01L21/48;H01L21/86;H01L23/482;H01L27/12;(IPC1-7):H01L21/205;H01L21/306 主分类号 H01L21/3213
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