| 摘要 |
PURPOSE:To obtain a signal change detector where number of components is a few and its pulse width is easily changed by providing a 2nd inverter transistor(TR) between an address signal input terminal and an inverter TR and providing a capacitance at the output of the TR. CONSTITUTION:An address signal input terminal A connects to the input of a CMOS inverter 12 and its output connects to a capacitor 13 and an input of a CMOS inverter 12. When an address signal entering the input terminal A changes from 'L' to 'H', the level of a node H changes from 'H' to 'L' because of the discharge of the capacitor 13 caused by an NMOS TR turned on. In this case, there is a state where a PMOS and an NMOS TR of the inverter 10 are simultaneously turned on, a through-current alpha flows, a voltage change is caused at an output terminal I and a signal change detecting pulse is obtained. On the other hand, when the address signal entering the input terminal A changes from 'n' to 'L', the level of the node H changes from 'L' to 'H' by the charging of the capacitor 13 caused by the turned on PMOS TR of the inverter 12 to obtain a signal change detection pulse similarly. |
