发明名称 Test circuit arrangement for a communication network and test method using same
摘要 A built-in test-signal generator (TG) and a built-in error-detection circuit (PE) independent of the test-signal generator are provided in a novel circuit arrangement. In response to an external stimulus, a signal path can be opened at a given point, and the signal from the test-signal generator (TG) can be injected. The signal taken from another, likewise externally selectable point of the signal path is checked in the error-detection circuit (PE); the result is fed out. Such a circuit arrangement is used to advantage where many like circuit arrangements are united in a broadband switching network consisting of a plurality of broadband switching modules. Since the test-signal generators and the error-detection circuits are independent of each other, systems tests can be performed without having to form any additional testing paths. Such a circuit arrangement also facilitates the testing of large-scale-integrated circuits already on the wafer, because no high-frequency test signals have to be applied and taken off.
申请公布号 US4881229(A) 申请公布日期 1989.11.14
申请号 US19870111935 申请日期 1987.10.21
申请人 ALCATEL, N.V. 发明人 KALTBEITZEL, GUNTER;KLEIN, MICHAEL;RENNER, MARTIN;WOLK, JOACHIM
分类号 H04M3/26;H04M3/24;H04Q1/24;H04Q11/04 主分类号 H04M3/26
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