发明名称 TIMING CONTROL SYSTEM
摘要 <p>PURPOSE:To select a machine cycle without depending upon the cycle time of an LSI, by providing a data processor with a little hardware such as an instruction register and a decoder and performing timing control without using a delay circuit. CONSTITUTION:The data processor is provided with a control memory 21, microinstruction register 22, decoder 23, LSI20, etc. A microinstruction is provided with a write-enable (WE) field and a read-enable (RE) field, and an instruction to be set in the register 22 is provided with a data operation field for data operation and an enable-signal specifying field specifying the on-off state of an enable-signal necessary for data transfer. Then, the output of the register 22 is inputted to the LSI20 directly and through an inverter 24 and NAND gates 25 and 26 to perform the timing control without using any delay circuit, selecting the machine cycle without depending upon the cycle time of the LSI20.</p>
申请公布号 JPS58169246(A) 申请公布日期 1983.10.05
申请号 JP19820052783 申请日期 1982.03.31
申请人 FUJITSU KK 发明人 SUMIYA KAZUO
分类号 G06F1/06;G06F9/22;G06F9/30 主分类号 G06F1/06
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