发明名称 STATUS SIGNAL PROTECTING CIRCUIT
摘要 PURPOSE:To improve the accuracy of a protection time and to attain high density packaging by constitution the circuit of a counter circuit subject to reset control by a status signal input and a clock pulse enable circuit controlled by the output of the counter circuit for a clock pulse input of the counter circuit. CONSTITUTION:A counter circuit 4 subject to reset control by a status signal input consists of a binary counter 4a and a clock pulse enable circuit controlling the clock pulse input of the counter circuit 4 by the output of the counter circuit 4 consists of a NOT gate circuit 5a receiving the output of the binary counter 4a and an AND gate 5b receiving the output of the NOT gate 5a and the clock pulse 3. Thus, the mis-control due to transient instability of the status signal is prevented.
申请公布号 JPH01233829(A) 申请公布日期 1989.09.19
申请号 JP19880059299 申请日期 1988.03.15
申请人 NEC CORP 发明人 NISHIKAWA KAZUO
分类号 H03K5/1254;H03K5/01 主分类号 H03K5/1254
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