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发明名称
OPERATION VERIFYING SYSTEM FOR LOGIC CIRCUIT
摘要
申请公布号
JPH01216280(A)
申请公布日期
1989.08.30
申请号
JP19880041410
申请日期
1988.02.24
申请人
NEC CORP
发明人
IINO YUKO
分类号
G01R31/317;G01R31/28;G06F17/50
主分类号
G01R31/317
代理机构
代理人
主权项
地址
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