发明名称 A/D CONVERTER AND CONVERTING METHOD
摘要 PURPOSE: To simplify configuration by providing coupling means so that the highest rank quantization loop can receive an input signal as an input terminal signal and all the loops other than the lowest rank loop can provide the input terminal signal to the just lower rank loop. CONSTITUTION: A converter 76 has quantization loop 79-81. The quantization loop 79 is provided with a subtracter circuit 82 having a 1st input for receiving an analog input signal X1, and the output of the subtracter circuit 82 is connected to the input of an analog integrator circuit 83 having a gain K1. The quantization loop 80 is provided with a subtracter circuit 90 having a 1st input connected to the output of a subtracter circuit 88 for providing a signal X2, and the output of the subtracter circuit 90 is connected to the input of an analog integrator circuit 91 having a gain K2. The quantization loop 81 is provided with a subtracter circuit 98 having a 1st input connected to an output X3 of a subtracter circuit 96. Thus, the configuration is simplified.
申请公布号 JPH01215127(A) 申请公布日期 1989.08.29
申请号 JP19890010125 申请日期 1989.01.20
申请人 MOTOROLA INC 发明人 NIKORASU BUAN BABERU;TEIMU EE UIRIAMUZU
分类号 H03M3/04;H03M3/02 主分类号 H03M3/04
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