发明名称 Digital circuit arrangement for quantization-noise reduction
摘要 The invention relates to a digital circuit arrangement which comprises an interpolation filter which over samples a digital input signal, a noise shaper (1) following the interpolation filter (1), and a digital-to-analog converter coupled to the output of the noise shaper. The noise shaper includes a quantizer whose output signal is the output signal of the noise shaper. A quantization-error signal is formed which is passed through a limiter, filtered and added to the output signal of the interpolation filter to provide correction.
申请公布号 US4859883(A) 申请公布日期 1989.08.22
申请号 US19870130367 申请日期 1987.12.08
申请人 U.S. PHILIPS CORPORATION 发明人 BRADINAL, WERNER H. W.
分类号 H03H17/00;H03H17/02;H03M1/00;H03M1/08;H03M3/04 主分类号 H03H17/00
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