发明名称 ACCESS CONTROL SYSTEM FOR CACHE MEMORY
摘要 PURPOSE:To prevent the address having the highest access frequency from vanishing out of a high-order or low-order cache by giving the access control to the exchange of the low-order caches with consideration taken into a fact that the exchange of the low-order caches exists on the high-order caches, as well. CONSTITUTION:Some of those lines are first exchanged based on the LRUs which are updated with accesses received from a means A which updates the LRUs of both internal and external caches and a line selection means B which drives out the contents of the oldest line. The LRUs are updated so as to decide that the accesses are also given to those lines existing in the low-order caches in the blocks to be exchanged during the progress of a means which updates the LRUs of the low-order caches. Otherwise the exchange line of the low-order caches is decided by selecting the oldest line via a low-order cache out of those lines which are not included in the high-order caches and included in the low- order caches.
申请公布号 JPH01199251(A) 申请公布日期 1989.08.10
申请号 JP19880022898 申请日期 1988.02.04
申请人 FUJITSU LTD 发明人 KATO TAKAO;YUHARA MASANOBU
分类号 G06F12/08;G06F12/12 主分类号 G06F12/08
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