发明名称 |
EPROM with increased floating gate/control gate coupling |
摘要 |
Disclosed is a floating gate memory array having high-speed programming capabilities. Diffused buried bit lines (14) are formed spaced apart in a semiconductor, forming conduction channels therebetween. Dielectric-filled trenches (24) are formed between the bit lines (14). An insulated floating gate conductor (18) and an insulated control gate conductor (23) are formed over the wafer and patterned to extend over the dielectric-filled trenches (24). The enhanced coupling efficiency between the control gate (23) and the floating gate (18) enhances the programmability of the memory cells.
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申请公布号 |
US4855800(A) |
申请公布日期 |
1989.08.08 |
申请号 |
US19870096176 |
申请日期 |
1987.09.11 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
ESQUIVEL, AGERICO L.;GROOVER, III, ROBERT;TIGELAAR, HOWARD L. |
分类号 |
H01L21/28;H01L21/762;H01L21/8247;H01L27/115 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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