| 摘要 |
<p>PURPOSE:To reduce a offset voltage by connecting the base of a fourth transistor having reverse polarity a third transistor with the collector of a first transistor and connecting a constant current source with the emitter of the fourth transistor. CONSTITUTION:The base of the fourth PNP transistor Q6 having the reverse porality is connected with the base of the third NPN transistor Q5, and the constant current source I3 is connected with the emitter, whereby the base is connected with the collector of the first transistor Q2. Since the base current of the transistor Q6 is decided by the current of the constant current source 13 and the current amplification factor of the transistor Q6, the current supplied to the transistor Q5 is compensated by the transistor Q6 when the base current is set to the same value as the base current of the transistor Q5. Thus, the collector current of the transistor Q2 is compensated and a difference between the operation currents of the transistors Q1 and Q2 consisting a differential circuit can be reduced, whereby the offset voltage can be reduced.</p> |
