| 摘要 |
PURPOSE:To increase the density of a memory cell array by forming a plurality of trenches into a region in which the memory cell array is shaped, and forming one transistor and one capacitor type DRAM memory cells into the trenches. CONSTITUTION:An N-type semiconductor layer 2 and a P-type semiconductor layer 3 are shaped onto a P-type substrate 1 through epitaxial growth, etc., and a trench 10 is formed by using RIE. A storage section 13 is shaped onto the sidewall of the trench through oblique ion implantation and solid phase diffusion from a diffusion source such as poly Si buried into the trench and SOG, etc. An insulating film is formed into the trench through thermal oxidation, CVD or the like, the insulating film on the base of the trench is etched through an anisotropic manner, and a capacitor insulating film 11 is shaped only onto the sidewall of the trench. Poly Si is deposited into the trench through LP-CVD, etc., and a cell plate electrode 12 is formed to the lower section of the trench. An insulating film 19 is shaped onto the cell plate electrode through CVD, etc., and a gate insulating film 16 is formed onto the sidewall of the trench through thermal oxidation. A drain 17 is shaped through ion implantation, etc., a gate electrode 18 is formed by using poly Si, etc., thus shaping a vertical type switching transistor onto the sidewall of the upper section of the trench 10. |
