| 摘要 |
<p>This invention relates to a cache memory device provided in a computer for providing a high speed access operation to the main memory of CPU. In this device, selection of entry is made on the basis of the operational mode of the computer. Accordingly, data used in one operational mode is stored into one area within the cache memory. So to speak, data will be stored into the cache memory, as being grouped into every data used in respective modes. For this reason, clear operation can be performed with the groups corresponding to respective modes being as units, respectively, resulting in no possibility that data used in other modes are collectively cleared. Eventually, an effective utilization of the cache memory can be realized and the access speed can be improved so that it is faster.</p> |
