| 摘要 |
PURPOSE:To attain simultaneous transmission of alarm information of two systems at the transmission side and to prevent synchronizing error at the reception side by detecting a parity information bit pattern and using it as synchronization decision. CONSTITUTION:The parity information bit pattern is detected and used for the synchronization decision. That is, a multi-frame marker bit pattern detecting circuit 5 and a parity information bit pattern detecting circuit 4 are provided and the synchronization decision is applied by the result of detection of the two circuits, multi-frame marker bit pattern detecting circuit 5 and parity information bit pattern detecting circuit 4. thus, an AND gate 6 outputs a synchronizing pattern detection pulse 9 to attain the multi-frame synchronization decision surely without causing an output at a wrong time. |
