| 摘要 |
PURPOSE:To enable the readout/write-in always stable even with noise, by performing the refresh of memory cell through the forming of address signal exclusively used for the refresh based on the address nonselection signal. CONSTITUTION:Normally, the control circuit repeats the memory access and nonaccess, and at memory access, in synchronizing with the address selection signal of the said memory cell chip, readout/write-in is made. If the control circuit is at nonmemory access and the memory is not selected, a signal is given to the FF-D1 via the NAND gate NA2 and inverter IN2 and output is produced in synchronizing with the clock phi4 to form the address strobe RAS2 with the NAND gate NA3 and inverter IN3, and this becomes the row address strobe RAS2 via the NOR gate NR. In this case, no column address strobe CAS is produced, and the memory cell is in refresh state. Further, repetitive refresh operation is made. |
