| 摘要 |
PURPOSE:To obtain a high-speed, high-reliability microprocessor system by detecting and correcting a memory error by utilizing a free time after an instruction or data is read out of a memory by a microprocessor. CONSTITUTION:A memory address generating circuit 6 has a counter circuit which counts up by one automatically and its output signal is supplied to the memory 22 through an AND gate 7 and an OR gate 3 by memory access signal 20 under the control of an NOT gate 21. The resulting read data from the memory 22 is supplied to an error detecting circuit 8 to check a humming code, and a correctable error is obtained to output an correctable error signal 9. Error data is then inputted to an error correcting circuit 12 to correct a one- bit error. The memory address generating an error is inputted to and stored in an error address register circuit 13 through an AND gate 10 and corrected data is inputted to and stored in a corrected data register circuit 14 through an AND gate 11. |
