发明名称 SIGNAL PROCESSING SYSTEM
摘要 PURPOSE:To effectively use a signal processing unit with simple constitution as a whole by connecting plural signal processors in a loop and applying stop control to a signal processing job for an input signal given to a signal processor of the pre-stage with respect to a desired signal processor. CONSTITUTION:After input signals SVM, SVA-SV(M-1) given from pre-stage signal processing units 22M, 22A-22(M-1) connected in a loop and input signals SV1, SV2, SV3 are subject to signal processing and synthesized, the result is outputted to the next-stage signal processing units 22B-22M, 22A. Moreover, plural signal processing units 22A-22M are provided, whose signal processing of input signals given from the pre-stage signal processing units 22M, 22A-22(M-1) is subject to stop control in response to control signals SCRA-SCRM. Furthermore, a controller 21 outputting the control signals SCRA-SCRM to desired signal processing units 22A-22M is provided. Thus, plural signal processing units are selected and used as required.
申请公布号 JPH01158883(A) 申请公布日期 1989.06.21
申请号 JP19870316963 申请日期 1987.12.15
申请人 SONY CORP 发明人 NAKAMURA YOSHIYUKI
分类号 H04N5/262;G06T15/00;H04N5/265 主分类号 H04N5/262
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