| 摘要 |
PURPOSE:To constitute a break circuit to correspond to a high clock frequency by break-detecting by plural latches to latch an address alternately for every bus cycle and a different circuit by each latch output. CONSTITUTION:An emulation processor 1 outputs a bus cycle signal SBC and a command fetch address signal SA which is advanced phase further than the signal. After the execution of a command by the signal SA, a break detecting part 2 to break-request to the processor 1 receives the signal SA at an input terminal, receives plural addresses latch circuits 3a and 3b to latch an address in order every time and the output signals of these, supplies a control signal to plural break detecting circuits 4a and 4b to execute break detecting and moreover the circuits 3a and 3b, and constitutes the circuits 4a and 4b by a control circuit 7 and so on to operation in order. Thus, the access time of the detecting circuit can be reduced, and a high clock frequency can be corresponded. |
