发明名称 SYNCHRONIZATION SWITCHING DEVICE
摘要 PURPOSE:To prevent the range of a change in irregular phase fluctuation of an output data string when a frame synchronization is unlocked even with a wide dynamic range from being widened by decreasing number of stages of buffer memories when the frame synchronization required to form a write clock of the buffer memories is unlocked. CONSTITUTION:When the frame synchronization required to form a write clock of buffer memories 5, 6 is unlocked, the number of stages of the buffer memories 5, 6 is decreased to reduce the storage period of each stage. Since the range in the change of irregular fluctuation of the phase of an output data occurred in this way is made narrow, the occurrence of an error for a long time from the unlocked clock synchronization in a demodulator of a succeeding radio line till the recovery of the clock synchronization is prevented. Since the possibility of unlocked clock synchronization in the succeeding demodulation is precluded, the number of stages of buffer memories is increased to widen the dynamic range of synchronization switching.
申请公布号 JPH01125139(A) 申请公布日期 1989.05.17
申请号 JP19870284940 申请日期 1987.11.10
申请人 NEC CORP 发明人 MORIMOTO HIDEAKI
分类号 H04L1/22;H04B1/74;H04J3/06;H04L7/08 主分类号 H04L1/22
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