| 摘要 |
PURPOSE: To reduce DC power consumption by inserting a bias element between each base of normal phase/complementary phase both load transistors and a negative voltage supply line, and separately connecting the output terminals of normal phase/complementary phase both output transistors to each base of the normal phase/complementary phase both load transistors. CONSTITUTION: Coupling capacitors 74 and 76 carry charges from each normal phase/complementary phase output line 66 and 64 to the base of each transistor 73 and 72. When the complementary phase output of the line 64 is turned into an 'H' level, and the normal phase output of the line 66 is turned into a 'L' level, the charge is carried to the base of the transistor 72 for pulling-in by the capacitor 76, and the transistor 72 is further hardly driven for reinforcing the pulling-in of the line 66 whose normal phase output is in the 'L' level. When switching currents running through the transistor 72 are about 4mA, the power consumption of the circuit can be only 2.18mW while the conventional power consumption of the circuit is 4.16mW. |
