| 摘要 |
PURPOSE:To make an effective use of a communication line by constituting the titled system so that a controller on the transmission side adds the address information of a processor on the reception side to data, multiplexes data at the unit of packet, and transmits, and a reception processing is executed by the processor designated by the address information on the reception side. CONSTITUTION:A transmission request from the processors 12-1-12-n is transmitted to a transmission/reception controller 11 through a control signal line 14. The control circuit 20 designates a DMAC 19 with respect to the processor giving a transmission-permission through an address bus 15 by a competition processing, and allows data set in a memory 18 to send a data bus 16. Also, the controller 11 converts the data to serial data by a serial/parallel transformation part 21, and a transmission/reception part 22 adds to the data a flag F or frame check sequence FCS in order to constitute the frame of a packet, then the data is transmitted to the communication line 13. If plural transmission requests are issued consecutively, the data is multiplexed in the unit of packet to be transmitted. On the reception side, a reception processing is executed by the processor designated by the address information.
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