发明名称 COMMAND SYNCHRONIZATION ESTABLISHING CIRCUIT
摘要 PURPOSE:To execute the synchronization establishment of a transmitting and receiving command by storing the ending condition of the transmitting and receiving command on a common bus interface with a command synchronization establishing circuit and informing of it in correspondence to an access from a main body device. CONSTITUTION:A main device 1 has a central control device, a main memory to be connected to this control device and a channel device to be connected to the central control device in duplex constitution. An input and output control device 3 is connected through these channel devices and a common bus interface 2 and the reception of data from a line and the transmission of the data of the main memory are executed by DMA operation with being not-synchronized. In this input and output control device 3, a command synchronization establishing circuit 4 is provided and the ending condition of the transmitting and receiving command on the interface 2 is stored and informed an input and output control device firmware according to the access from the device 1. Thus, the synchronization of the command can be obtained between the device 1 and the device 3.
申请公布号 JPS6476249(A) 申请公布日期 1989.03.22
申请号 JP19870234093 申请日期 1987.09.18
申请人 FUJITSU LTD 发明人 MISE KIYOBUMI;NARA TAKASHI;TAKANO RYOJI;HATANO TAKASHI;MORITA SUMIE
分类号 G06F13/12;G06F13/14 主分类号 G06F13/12
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