发明名称 Multifunction arithmetic logic unit circuit
摘要 A multifunction arithmetic logic circuit having comparison and numeric conversion circuitry, particularly adapted for use in graphics processing. The inventive architecture comprises a modular arithmetic logic unit in a pipelined architecture circuit. Functions performed are conversion of floating point numbers to fixed point numbers, and vise versa, arithmetic and logical operations, and numeric comparison operations. A visibility logic subcircuit is included for rapidly tracking numeric comparisons to indicate whether a graphics object is to be considered visible, partially visible, or invisible.
申请公布号 US4815021(A) 申请公布日期 1989.03.21
申请号 US19860824053 申请日期 1986.01.30
申请人 STAR TECHNOLOGIES, INC. 发明人 STEINER, WALTER R.;SIMONCIC, PAUL A.
分类号 G06F7/38;G06F7/483;G06F7/508;G06F7/57;G06T15/40;H03M7/24;(IPC1-7):G06F7/38 主分类号 G06F7/38
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