发明名称 Planarization of metal films for multilevel interconnects
摘要 In the fabrication of multilevel integrated circuits, each metal layer is planarized by heating to momentarily melt the layer. The layer is melted by sweeping laser pulses of suitable width, typically about 1 microsecond duration, over the layer in small increments. The planarization of each metal layer eliminates irregular and discontinuous conditions between successive layers. The planarization method is particularly applicable to circuits having ground or power planes and allows for multilevel interconnects. Dielectric layers can also be planarized to produce a fully planar multilevel interconnect structure. The method is useful for the fabrication of VLSI circuits, particularly for wafer-scale integration.
申请公布号 US4814578(A) 申请公布日期 1989.03.21
申请号 US19870065473 申请日期 1987.06.23
申请人 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE DEPARTMENT OF ENERGY 发明人 TUCKERMAN, DAVID B.
分类号 H01L21/268;H01L21/321;H01L21/768;(IPC1-7):B23K26/00 主分类号 H01L21/268
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