| 摘要 |
PURPOSE:To realize the DMA transfer with high reliability, by inspecting the memory writing addresses in each transfer cycle during the DMA transfer so that the memory address which is possibly written wrong can be recognized. CONSTITUTION:A comparator 6 compares the address value which is outputted to an address bus by a DMA controller 1 in a memory writing cycle during the DMA transfer with the counted value of an address counter 7. Then the comparator 6 produces an error status signal to stop the operation of the controller 1 when no coincidence is obtained between said address value and counted value. The error status signal is held by an interruption latch 3 as an interruption signal to be applied to a microprocessor. At the same time, the error status signal is stored in a status register 4 so that the error occurrence information can be read out of the microprocessor. Thus it is possible to recognize the DMA writing address having an error and to enable the microprocessor to take a proper countermeasure. |
