A method of initializing a data processing system.

摘要

An interface apparatus between a pair of processors such as a host processor (70) and a processor (31) in an intelligent controller (30) for mass storage devices (40) has a multi-step initialization procedure to check the integrity of the communications path between host and controller. In particular, the communications path includes a register and information is written to and read from the register to verify correct operation of each bit of the register. As part of the write-read process, certain host-specific parameters, such as the sizes of the ring-type queues and their starting addresses is sent from the host to the controller. Capability is shown also for allowing repeated access to the same host memory location for successive reads, writes, or any combination of the two. With bus adapters which impose rigid sequencing rules which do not allow reads and writes to be mixed, the adapter channel is purged between successive accesses to the same location. The port requests the purge and it is executed by the host.