| 摘要 |
PURPOSE:To arbitrarily control acceptance or reject of an asynchronous interrupt from the external of a CPU without changing contents of a mask information storage part by providing an asynchronous interrupt control means and an interrupt acceptance control means. CONSTITUTION:An asynchronous interrupt control means 12 generates an interrupt control signal, which indicates acceptance or reject of the asynchronous interrupt, by the external operation. An interrupt acceptance control means 13 receives mask information from a mask information storage part 11, the interrupt control signal from the asynchronous interrupt control means 12, and an asynchronous interrupt signal, and it is determined whether the asynchronous interrupt is permitted or not in accordance with mask information if the interrupt control signal permits the asynchronous interrupt, but the asynchronous interrupt is not permitted independently of mask information if the interrupt control signal does not permit the asynchronous interrupt. Thus, acceptance or reject of the asynchronous interrupt is arbitrarily controlled from the external of a CPU 10 without changing contents of the mask information storage part 11. |
