发明名称 FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To increase the height of a Schottky barrier, and reduce the gate leak current, by installing a Schottky gate electrode on a modulation doped AlInAs layer via an AlGaAs layer whose thickness is less than or equal to a threshold value generating lattice mismatching dislocation. CONSTITUTION:On a semiinsulative InP substrate 1, the following are provided; a high purity Ga0.47In0.53As layer 2 arranged in the lattice-matching manner, an Al0.48In0.52 As layer 4 which is lattice-matched with the layer 2 to form an electron storage layer 3 in the layer 2 and forms a hetero junction with discontinuity of a specific conduction band by doping N-type impurity at least in a part, and a gate electrode 7 which is in contact with the layer 4, arranged via an Al0.4Ga0.6As (0<x<1) layer 5 of 2nm thick being less than or equal to threshold film thickness generating lattice mismatching dislocation, and controls the electron concentration of the electron storage layer 3 in the layer 2. In this constitution, lattice mismatch exists between Al0.48In0.52As and AlxGa1-x, so that an AlxGa1-xAs layer whose thickness is less than or equal to the threshold film thickness generating dislocation due to lattice mismatching is installed as a means to evade the lattice mismatching. Thereby, the effective height of a Schottky barrier is increased in the state without generating dislocation, so that the gate leak current can be reduced.
申请公布号 JPS6441273(A) 申请公布日期 1989.02.13
申请号 JP19870197671 申请日期 1987.08.07
申请人 NEC CORP 发明人 KASAHARA TAKEMOTO
分类号 H01L29/205;H01L21/338;H01L29/43;H01L29/778;H01L29/812 主分类号 H01L29/205
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