发明名称 STEREO DEMODULATING CIRCUIT
摘要 PURPOSE:To obtain a stable switching signal throughout a wide temperature range by generating the switching signal synchronized with a subcarrier by a PLL circuit in the polar system. CONSTITUTION:In a frequency dividing means 13 of a PLL circuit 14, the output of a voltage controlled oscillator 4 which generates four fold subcarrier frequency is divided in a first frequency dividing circuit 5 by 1/2 and is divided in a second frequency dividing circuit 6 by 1/4. A phase shifter 7 generates a first switching signal whose frequency and phase coincide with those of the subcarrier and a second switching signal which has the same frequency as the subcarrier and has a phase dif ferent from the subcarrier by 180 deg. on the basis of outputs of frequency dividing circuits 5 and 6. Since analog switches 8 and 9 receive first and second switching signals and are turned on/off, they are accurately turned on/off in positive/negative half cycles of the subcarrier.
申请公布号 JPS6437139(A) 申请公布日期 1989.02.07
申请号 JP19870193182 申请日期 1987.07.31
申请人 SHARP CORP 发明人 TOCHIHARA HIROAKI;YOSHIFUSA KOJI
分类号 H03L7/06;H04H40/45 主分类号 H03L7/06
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