| 摘要 |
PURPOSE:To effectively utilize a main storage device by reading out a request fetch data in order of an address, executing an access to the succeeding address from the address of a dead bank, and executing the move in to an intermediate buffer. CONSTITUTION:A block size of an LBS (local buffer) provided in a CPU, and a block size of a GBS (intermediate buffer) are set to 32 bytes and 64 bytes, respectively. When the GBS executes a miss with respect to a block fetch request from the CPU, as for the first half 32 bytes, it is necessary to return a fetch data to the CPU from an MSU (main storage device), therefore, an access to the MSU is executed order of an address. As for the latter half 32 bytes, it is unnecessary to return the data to the CPU, therefore, the access is executed from a dead bank of the MSU and move-in is executed to the GBS. By said control, the access to the MSU in a move in state that it is unnecessary to return the fetch data to the CPU can be executed efficiently and successively from the bank which is not busy.
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