发明名称 TRANSFER SYSTEM FOR MEMORY MAPPED DATA
摘要 PURPOSE:To improve the overall processing speed of a data transfer system by using a dual port random access memory (RAM) to the data buses set among computer systems forming a computer network system composed of plural computer systems. CONSTITUTION:The dual port RAM 18-20 are used to the data buses set among computer systems I-IV containing CPU 1, 5, 9 and 15 and forming a computer network system. In such a constitution, it is possible to write data from a certain system via a certain port in parallel to a job where data are read out of another port to another system. Furthermore the systems set at both sides of each of RAM 18-20 can be run independently of each other since the access times of RAM 18-20 are shorter than the instruction executing times of CPU 1-15. Thus the overall processing speed is improved for a system transformed into a network.
申请公布号 JPS63314668(A) 申请公布日期 1988.12.22
申请号 JP19870151774 申请日期 1987.06.17
申请人 MOSUTETSUKU:KK;SAKAI TEISHIRO 发明人 SAKAI TEISHIRO
分类号 G06F13/38;G06F15/16;G06F15/167 主分类号 G06F13/38
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