摘要 |
PURPOSE:To facilitate the design of software and to reduce load on the software, by delaying an access signal outputted from a microprocessor to an input/ output equipment in a hardware way. CONSTITUTION:A delay circuit 8 outputs an I/O access signal ASA or ASB to respective signal line 80A or 80B by delaying it corresponding to the operating speed of I/O device 21-24 in two stages, for example, corresponding to the operating speed of I/O devices 21 and 22 which belong to a fast I/O device group 2A and I/O devices 23 and 24 which belong to a slow I/O device group 2B. Therefore, even when the microprocessor outputs a port address to select the input/output equipment and an access signal to operate the input/output equipment successively, they are supplied to the input/output equipment by delaying the access signal by a time equivalent to the recovery time of the input/output equipment. In other words, the guarantee of the delay time of an operation possible to perform the actual transmission/reception of the data after a time when a select signal reaches the input/output equipment is performed in the hardware way. In such a way, it is possible to make a processing by the software unnecessary, and to reduce the load on the software.
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