发明名称 |
FAILSAFE DECISION CIRCUIT |
摘要 |
<p>. IMPROVEMENTS IN OR RELATING TO DECISION CIRCUITS. A decision circuit (20) is responsive to digital input signals (22) and to timing signals (21) for reshaping and retiming the input signals into reshaped and retimed output signals. The decision circuit also is responsive to the digital input signals and absence of the timing signals for reshaping but not retiming the digital input signals into reshaped output signals which are transmitted. Thus the circuit produces and transmits reshaped output signals even upon failure to apply the timing signals as required by previous decision circuits.</p> |
申请公布号 |
CA1245731(A) |
申请公布日期 |
1988.11.29 |
申请号 |
CA19840452865 |
申请日期 |
1984.04.26 |
申请人 |
AMERICAN TELEPHONE AND TELEGRAPH COMPANY |
发明人 |
PASKI, ROBERT M. |
分类号 |
H04L25/52;H03K3/2885;H03K5/12;H03K17/60;H04L25/06;H04L25/24;(IPC1-7):H03K5/01 |
主分类号 |
H04L25/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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