摘要 |
PURPOSE:To obtain a desired signal delay by giving a priority code in response to a specific delay quantity to an input terminal and selecting the input terminal in response to the required delay quantity required at the time of forming a signal path. CONSTITUTION:When the input at an input terminal I1 changes, the parasitic capacitor of an N-channel transistor (TR) N1 to be discharged is C1. Similarly, when the input at an input terminal I2 changes, the parasitic capacitor is C1+C2 and when the input to an input terminal I3 changes, the parasitic capacitor is C1+C2+C3. That, is, both the leading delay and the trailing delay are minimized at the input change at the input terminal I1 and maximized at the input change at the input terminal I3. Thus, the priority is placed onto the input terminals I1-I3 in the order of smaller delay time. Thus, in forming a signal path by connecting the output of a circuit to the input of other circuit, since the priority is selected according to the required delay for the exchangeable input, the high speed is attained without malfunction. |