| 摘要 |
PURPOSE:To attain high speed comparision processing for an analog voltage by providing a setting means setting an optional digital value, and a holding circuit holding the result of comparison between an analog input voltage and an analog quantity corresponding to the said digital value to a sequential comparison register. CONSTITUTION:With a MODE signal at level '1', the A-D conversion by means of the same sequential comprision as that of a conventional device is applied. When the MODE signal with a level '0' supplied thereto, the comparison with an optional digital setting value is supplied. Then a digital value setting means sets digital values X, X2, X1, X0 corresponding to comparison voltage are set to the other input of a sequential comparison register 1. In setting the MODE signal to '0', an analog input voltage to the comparator 3 is compared with the analog voltage A, X2, X1, X0 corresponding to an optional digital value X set to the register 1. As a result, when the analog input voltage is larger than the voltages A, X2, X1, X0, a FLAG signal of a FF 5 is logical '1', and when the analog input voltage is smaller than them, the FLAG signal is logical '0'. The comparison is executed in the same time as that of the comparison processing of one bit at A-D conversion and high speed comparison processing is attained.
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