发明名称 |
SYNCHRONISATION DEVICE FOR A FRAME-STRUCTURED DIGITAL TRANSMISSION, AND RECEIVER CONTAINING SUCH A DEVICE |
摘要 |
A synchronization device for digital data frame transmission system comprising an n bit series register transferring its contents at the line frequency to a parallel register also of n bits. The m first bits of the series register are also directed to a logic circuit which tests their conformity with the beginning of the synchronization word. When there is conformity, the logic circuit controls a divider dividing by n which controls, in its turn, at the line frequency divided by n, the transfer of the contents of the parallel register to a PROM memory. The purpose of the PROM is to recognize the entire synchronization word. When there is no recognition, the operation of the divide by n divider is inhibited and the procedure begins again. |
申请公布号 |
DE3474492(D1) |
申请公布日期 |
1988.11.10 |
申请号 |
DE19843474492 |
申请日期 |
1984.07.03 |
申请人 |
ALCATEL CIT |
发明人 |
NIQUEL, MAURICE;GOURDON, CLAUDE;ROUXEL, JEAN |
分类号 |
H04J3/06;(IPC1-7):H04J3/06 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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