发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT UNIT
摘要 PURPOSE:To increase the value of the parasitic capacitance between a collector and a grounding as well as to prevent the generation of noise and an erroneous operation by a method wherein an MOS capacitor is formed between a bonding pad and the polycrystalline silicon electrode arranged at the lower part of the bonding pad, and said polycrystalline silicon electrode is connected to the P<+> diffusion layer of ground potential. CONSTITUTION:Oxidizing and window forming operations are conducted using a P-type substrate, and an N-type buried layer 82 is formed. At this time, the buried layer to be formed directly below a switching transistor is widely formed covering the whole region of the bonding pad which will be formed later. Then, after an N-type epitaxial layer 53 has been grown in the substrate, a P-type diffusion region 84 is diffused surrounding the buried layer 82, and an isolating operation is performed. Subsequently, a P-type region 85 is formed, and an N-type emitter 86 and a collector 87 are formed. Then, a window is perforated on the region 89, which becomes a capacitor, using a photolithography method, polycrystalline silicon is doped, the polycrystalline silicon is removed by etching leaving the lower part of the bonding pad. Then, a contact window is provided, and a metal wiring is conducted.
申请公布号 JPS63268274(A) 申请公布日期 1988.11.04
申请号 JP19870101771 申请日期 1987.04.27
申请人 OKI ELECTRIC IND CO LTD 发明人 TSUBONE HITOSHI
分类号 H01L29/73;H01L21/331;H01L21/822;H01L27/04;H01L29/72;H01L29/732 主分类号 H01L29/73
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