发明名称 Vector processor capable of parallely executing instructions and reserving execution status order for restarting interrupted executions
摘要 In a processor such as a vector processor in which a plurality of data are processed by one instruction and a plurality of instructions are parallely processed, apparatus is provided for storing, during an interruption of the program currently being executed, the instructions being executed in the conceptual order of appearance in the program of the instruction being executed, and the sequential count of the sets of data processed. The stored information is used to restart the execution of the interrupted program at the appropriate point.
申请公布号 US4782441(A) 申请公布日期 1988.11.01
申请号 US19860872396 申请日期 1986.06.10
申请人 HITACHI, LTD. 发明人 INAGAMI, YASUHIRO;NAGASHIMA, SHIGEO;OMODA, KOICHIRO;NAKAGAWA, TAKAYUKI;TANAKA, TERUO
分类号 G06F9/46;G06F9/38;G06F9/48;G06F15/78;G06F17/16;(IPC1-7):G06F9/28;G06F7/00 主分类号 G06F9/46
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