发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To miniaturize the circuit by providing a phase locked loop circuit using a low speed voltage controlled oscillator to the pre-stage of the phase locked loop circuit using a high speed voltage controlled oscillator and feeding back negatively an output of the high speed voltage controlled oscillator to the loop thereby decreasing the shift of the self-running frequency and eliminating the need for a multiplier circuit. CONSTITUTION:The signal having an input phase theta1 is frequency-divided by a frequency divider 1 and the output phase is theta1/N. The phase is compared with the output phase theta0/L being subject to 1/L frequency-division by means of a frequency-divider 9 at a phase comparator 2. The high frequency of the output of the phase comparator 2 is cut off by a low pass filter 3 and the low frequency becomes a control voltage of a voltage controlled oscillator 4 of low speed stability type. The temperature fluctuation and secular change are less in the voltage controlled oscillator 4. The output phase theta2 of the voltage controlled oscillator 4 is compared with the output phase theta0/M being the frequency-division of the output phase theta0 at a frequency divider 8 by a phase comparator 5. The high frequency of the output of the phase comparator 5 is cut off by a low pass filter 6 and the low frequency becomes a control voltage of a high speed unstable type voltage controlled oscillator 7. The phase fluctuation of the voltage controlled oscillator 7 is cancelled as the phase fluctuation of the voltage controlled oscillator 4 and is not the phase fluctuation of the phase locked loop output, and the temperature fluctuation and secular change in the output of the phase locked loop circuit are stable output of the voltage controlled oscillator 4.
申请公布号 JPS63258116(A) 申请公布日期 1988.10.25
申请号 JP19870092871 申请日期 1987.04.15
申请人 NEC CORP 发明人 MATSUMOTO KOJI
分类号 H03L7/08;H03L7/10 主分类号 H03L7/08
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