| 摘要 |
PURPOSE:To obtain the titled memory only by adding a circuit to a general memory by connecting a bus for a port corresponding to a chip selecting signal or a read/write command signal selected by an arbitration means and held by an output holding means to a memory. CONSTITUTION:When an enabled select signal exists, a WAIT signal is outputted to a port corresponding to the select signal. When there are many enabled select signals, arbitration is executed and only one enable signal is outputted as the result of said arbitration. Thereby, a controller 4 to be opened by a transmitting/receiving device (T/R) corresponding to the selected bus holds an arbitor 3, and when the WAIT signal (ACK signal) from a memory 1 is disabled, the WAIT signal from the port outputting the enable signal is disabled. After disabling the previously selected select signal, a STP signal is cleared.
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