发明名称 |
Semiconductor integrated circuit device with built-in arrangement for memory testing |
摘要 |
A semiconductor integrated circuit device which inhibits the output of programmed data of its built-in memory to external terminals but outputs the result of a comparison of the programmed data with an input signal supplied from a first external terminal to a second external terminal.
|
申请公布号 |
US4777586(A) |
申请公布日期 |
1988.10.11 |
申请号 |
US19860909927 |
申请日期 |
1986.09.22 |
申请人 |
HITACHI, LTD. |
发明人 |
MATSUBARA, KIYOSHI;YAMAURA, TADASHI |
分类号 |
G11C29/00;G06F21/00;G11C29/02;G11C29/04;(IPC1-7):G06F12/00 |
主分类号 |
G11C29/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|