| 摘要 |
PURPOSE:To prevent overflow of data at a terminal interface by providing a hardware such as speed comparison circuit to an interface device at a transmission side so as to change a data transmission speed to a receiving side in response to the data transmission speed of a terminal device at the transmission side. CONSTITUTION:The interface device INFA at the transmission side is provided with a character assembling section CST, a speed comparison circuit COM and a reference speed clock generator and the data transfer speed from a data terminal device DTA is compared with a reference speed. When the transfer speed is faster through the comparison, the speed information is transmitted to an interface device INFB at the receiving side via a digital exchange network DNW. A speed bit is detected by a speed bit detector DFT of the device INFB so as to control a switching circuit SEL, and a clock generator is changed over from the standard clock generator to the maximum clock generator, the maximum clock is transmitted to a transfer circuit TRN and the transfer speed to the data terminal device DTB at the receiving side is quickened. |
