| 摘要 |
PURPOSE:To allow the titled processor to correspond to various variable length codes without using a memory by inputting parallel data from a serial/parallel converting circuit to a latch circuit, outputting a converted length signal from the latch circuit so that the converted length of encoded data are decided based on the number of converted bits. CONSTITUTION:Input data or data 202 serial/parallel converted from encoded data by the serial/parallel converting circuit 21 are latched by the latch circuit 22 and data 203 from the latch circuit 22 are outputted as a converted length signal 204 by a variable length decoder 23. The signal 204 is code-converted by an encoder 24, the encoded data 205 is converted into a serial data by a parallel/serial converting circuit 25 and serial data 206 is outputted. At that time, a frequency divider 29 divides the frequency of a reference pulse 207 correspondingly to the converted ratio of variable length and inputs its output pulse 208 to a shifted distance deciding ring counter 26 and the counter 26 decides the converted length on the basis of the number of converted bits and inputs its output 211 to a parallel/serial converting circuit 25. Thus, the processor can be allowed to correspond to various variable length codes.
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